Computer Architecture Group

Computer Architecture Group Computer Architecture Group is a research team at Wrocław University of Technology. We build chips, heat up processors and drop wireless sensors around. z o.o.

Computer Architecture Group (CAG) is a research team within the structure of the Institute of Computer Engineering, Control, and Robotics (CECR). The team is lead by Prof. Janusz Biernat. Our current research interests cover a broad scope of areas related to both embedded and high-performance end of the computing spectrum:

- applications of emerging devices to logic circuit design (mainly, Negati

ve Differential Resistance devices),
- Residue Number System and its applications to embedded Digital Signal Processing,
- thermal and performance modelling and simulation of high-performance many-core processors,
- acceleration of numerical simulations in computational fluid dynamics using GPU,
Wireless Sensor Networks and their applications. At different levels of intensity, we collaborate with a number of domestic and foreign research laboratories and universities, including Virginia Tech, Arizona State University, Grenoble INP, Université de Lorraine, University of Technology Sydney, as well as companies, most prominently KGHM Polska Miedź S.A. Through the Wrocław Academic Hub we colaborate with Neurosoft sp. z o.o., Nokia Siemens Network sp. z o.o, REC-global sp. z o.o, and Vratis sp. We welcome students' participation in our research activities on both graduate and undergraduate levels.

The Hardware/Software Interface course starts today!Lots of useful knowledge free of charge: how high-level program is c...
01/07/2014

The Hardware/Software Interface course starts today!
Lots of useful knowledge free of charge: how high-level program is converted to processor instructions, how pointers work, how memory hierarchy affects software performance and much more. Recomended course for all CS undergraduates.

https://www.coursera.org/course/hwswinterface

The Hardware/Software Interface is a free online class taught by Gaetano Borriello and Luis Ceze of University of Washington

VLSI CAD: Logic to Layout  starts today!Enrol for a free 10-week course on computational boolean algebra, logic verifica...
03/03/2014

VLSI CAD: Logic to Layout starts today!
Enrol for a free 10-week course on computational boolean algebra, logic verification and synthesis, technology mapping, timing analysis, ASIC placement and routing.
https://www.coursera.org/course/vlsicad

VLSI CAD: Logic to Layout is a free online class taught by of University of Illinois at Urbana-Champaign

07/10/2013

Member of our group Dr Krzysztof Berezowski joined the Board of Directors of the DASH7 Alliance. The DASH7 was formed to develop new standard of the sub 1GHz Radio Technology communication based on the Alliance Mode Protocol.

More info at http://www.dash7.org/.

28/08/2013

This video covers the basics of diodes, bridge rectifiers, and how to build simple unregulated AC to DC power supplies than can handle a few mA up to several...

07/08/2013

South Korea has rolled out the world's first road-powered electric vehicle network. The network consists of special roads that have electrical cables buried just below the surface, which wirelessly transfer energy to electric vehicles via magnetic resonance. Road-powered electric vehicles are exciti...

05/08/2013

Nadchodzi szansa dla przedsiębiorczych studentów i absolwentów. Masz biznesową żyłkę, głowę pełną pomysłów? To szansa dla Ciebie, zwycięzca konkursu Eco Talent otrzyma wsparcie finansowe do 100 tys...

30/07/2013

Study in Poland - New European educational destination

15/07/2013

Everyone knows Cambridge is pretty, Oxford's not bad either, etc etc, but have you ever ogled at Otago University in New Zealand? Or Xiamen University, China.

Eurora, installed at the CINECA Supercomputing Center in Italy, topped Green500 at 3.21 gigaflops/watt, and Aurora Tigon...
08/07/2013

Eurora, installed at the CINECA Supercomputing Center in Italy, topped Green500 at 3.21 gigaflops/watt, and Aurora Tigon was a close second at 3.18 gigaflops/watt.

Top end of Green500 is dominated by heterogeneous supercomputers

08/07/2013

The consumer of the future will be an algorithm

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Ulica Z. Janiszewskiego 11/17
Wroclaw
50-372

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